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SC4541
Applications Information ( continued)
PCB Layout Considerations
Poor layout can degrade the performance of the DC-DC
converter and can be a contributory factor in EMI prob-
lems, ground bounce, thermal issues, and resistive
voltage losses. Poor regulation and instability can result.
A typical application schematic is shown in Figure 1. A
typical PCB layout is shown in Figure 4.
The following design rules are recommended:
? Place the inductor and filter capacitors as close
to the device as possible and use short, wide
traces between the power components.
? Use a ground plane to further reduce noise
interference on sensitive circuit nodes.
VIN (5V)
R5
U1
10K Ω
PWM(300Hz, 3.3V)
L1
10 μ H
C3
1 μ F
16V
IN EN
SC4541
OUT
GND
C2
1 μ F
35V
R1
10 Ω
V OUT
SW
EDP
FB
LED1
LED2
LED3
L1: MURATA LQH3NPN100NM0 (10 μ H/ 550mA/ 3x3x1.4(mm)
C2: MURATA GRM188R7YA105K(1 μ F/ X7R/ 35V/ 0603)
LED4
LED5
Efficiency Boost_Iout
Efficiency Boost_Vout
C3: MURATA GRM188R71C105K(1 μ F/ X7R/ 16V/ 0603)
LED1 to 6: Everlight 12-21C/T3D-CP1Q2B12Y/2C
LED6
Figure 1 — Typical Application Schematic, Boost Topology
85%
80%
5Vin, 10uH(A915AY-100M)
82%
80%
75%
78%
10uH(A915AY-100M)
70%
65%
3S1P
4S1P
76%
60%
55%
50%
5S1P
6S1P
7S1P
8S1P
74%
72%
70%
5Vin
3.6Vin
0
3
5
8
10 13
Iout(mA)
15
18
20
8
10
12
14
16
Vout(V)
18
20
22
24
26
12
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